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| author | Benedikt Niedermayr <benedikt.niedermayr@siemens.com> | 2022-11-02 14:30:47 +0100 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-11-02 10:03:12 -0400 |
| commit | 1f1e46b83b7db08c8db31816c857e27da84d4ca3 (patch) | |
| tree | 3f89223aab033abda502a6c7d69319e916ccff0f | |
| parent | 89aed3cd5cb951113b766cddd9c2df43cfbdafd5 (diff) | |
| download | linux-mem-ctrl-1f1e46b83b7db08c8db31816c857e27da84d4ca3.tar.gz | |
dt-bindings: memory-controllers: ti,gpmc: add wait-pin polarity
The GPMC controller has the ability to configure the polarity for the
wait pin. The current properties do not allow this configuration.
This binding directly configures the WAITPIN<X>POLARITY bit
in the GPMC_CONFIG register by setting the "ti,wait-pin-polarity"
dt-property.
Signed-off-by: Benedikt Niedermayr <benedikt.niedermayr@siemens.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20221102133047.1654449-3-benedikt.niedermayr@siemens.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
| -rw-r--r-- | Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml b/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml index 6e3995bb16306..4a257fac577ef 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml @@ -230,6 +230,13 @@ properties: Wait-pin used by client. Must be less than "gpmc,num-waitpins". $ref: /schemas/types.yaml#/definitions/uint32 + ti,wait-pin-polarity: + description: | + Set the desired polarity for the selected wait pin. + 0 for active low, 1 for active high. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + gpmc,wait-on-read: description: Enables wait monitoring on reads. type: boolean |